There is known an electronic device in which a plurality of semiconductor chips each provided with a power transistor are mounted on a board (see Japanese Patent Application Laid-Open Publication No. 2016-66974 (Patent Document 1), Japanese Patent Application Laid-Open Publication No. 2002-203941 (Patent Document 2), and Japanese Patent Application Laid-Open Publication No. 2006-86438 (Patent Document 3)). The power transistor provided in each of the semiconductor chips is used as, for example, a switching element constituting a part of a power conversion circuit. In addition, there is known a technique in which a metal plate connected to a positive terminal and a metal plate connected to a negative terminal are disposed to face each other at a short distance, whereby parasitic inductance of each metal plate is reduced by using mutual inductance generated between the metal plates.